Tiny RISC Special Register File
Decode stage, where it forwards the updated
data to the second instruction after the instruction in question. The other
forwarding unit is in the Execution stage, where it forwards the updated data to the
instruction immediately following the instruction in question.
The purpose of the MorphoSys project is to
increase the performance of image processing applications with its unique RC Array-Tiny
RISC design. The RC Array dramatically speeds up compute-intensive array-type
operations, while the Tiny RISC handles routine operations efficiently. Among the
applications studied are Auto-matic Target Recognition (ATR), Motion Estimation (ME), and
Discrete Cosine Transform (DCT).
It was found that while MorphoSys is not as efficient as ASICs (i.e. for ME, it takes
almost twice as many cycles as an ASIC designed especially for ME), MorphoSys performs
much better than a non-reconfigurable processor, like the Intel MMX, which was designed to
speed up multimedia (image, audio, etc.) processing applications. The Intel MMX
processor uses approximately 28-times the number of cycles needed by MorphoSys to perform
full search block matching (for ME), and 10-times the number of cycles to do DCT.
The MorphoSys project has proven that a
dynamically reconfigurable processor is capable of vast improvements over a
non-reconfigurable processor in terms of speed. The future goals of the project
include integrating a reconfigurable memory array into the processor, which will allow
better utilization of memory resources and greater performance gains, and producing the
complete MorphoSys prototype processor within two years. The first prototype,
without the reconfigurable memory array, is due at the end of 1998.
Format of SREG(0)
My undergraduate research is supported by
the UC Irvine Presidential Undergraduate Fellowship (PUF) and the Undergraduate Research
Opportunities Program. Thanks to Professor Nader Bagherzadeh for taking me on as an
undergraduate researcher, to Professor Eliseu Filho and Guangming Lu for their invaluable
help in my portion of the project, and to Hartej Singh for his willingness in explaining
portions of the project in which I am not involved. The following other people have
contributed to the MorphoSys project and directly or indirectly aided in the composition
of this paper: Professor Fadi Kurdahi, Professor Tomas Lang, Robert Heaton, Ming-Hau Lee,
Maneesha Bhate, Matt Campbell, Alexander Gascoigne, Nambao Van Le, Robert Powell, Rei Shu,
Lingling Sun, Cesar Talledo, Eric Tan, Tom Truong, and Tim Truong. My sincerest
thanks to all of you. Most importantly, I want to thank my parents for supporting me
through college, and my grandmother for taking care of me.
Singh, Hartej, Ming-Hau Lee,
Guangming Lu, Fadi J. Kurdahi, Nader Bagherzadeh, Tomas Lang, Robert Heaton, and Eliseu M.
C. Filho. "MorphoSys: An Integrated Re-configurable Architecture." NATO
Symposium on System Concepts and Integration. Monterey, CA. April 1998.