U-Tee Cheah

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U-Tee Cheah


U-Tee "Benjamin" Cheah began his research experience by casually approaching his faculty mentor.  His project focused on enhancing graphics performance via a novel processor. Ben's most memorable experience occurred when, after much labor, his portion of the project worked.  In the future, Ben hopes to attend business or engineering graduate school.  He advises students to establish a productive dialogue with their professors in order to facilitate their research. triangle.gif (504 bytes)




Dynamically reconfigurable microprocessor design is an intriguing prospect for the microprocessors of the future.   Dynamic reconfiguration means that the microprocessor can reconfigure itself (the datapath) during execution of a program to optimize its performance, rather than having a pre-determined datapath.  The MorphoSys project involves designing a dynamically reconfigurable microprocessor geared specifically toward image processing applications and determining if the trade-off in time, cost, and silicon area result in an overall better microprocessor.
    The microprocessor will include a Tiny Reduced Instruction Set Computer (RISC) processor to implement normal processor functions, and an array of Reconfigurable Cells (RCs), which will implement most image processing applications more efficiently than the general purpose processor.  The design also includes a Frame Buffer (FB) to store whole frames of images for use by the RCs, and a Direct Memory Access (DMA) controller to provide the FB faster access to memory
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Faculty Mentor                                                                                                                
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Nader Bagherzadeh

School of Engineering

The MorphoSys project is targeted for the design of a new generation of microprocessors that will enable the emerging technologies such as: smart missiles, wireless audio/video communicators, autonomous vehicles, and many other technologies planned for the beginning of the next millennium to come to fruition.  The Reconfigurable Computing Laboratory of UCI is one of the selected groups in the nation to work on a new paradigm for developing “soft” hardware computer technologies.   The notion of “soft” hardware refers to the reconfigurability of the hardware, which is different from current microprocessors.  Reconfigurable hardware systems are more flexible allowing the system to adjust its hardware resources to accommodate the needs of the user.  The UCI group is working on a new microchip called M1 that implements the ideas developed for the MorphoSys project.triangle.gif (504 bytes)

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U-Tee Cheah - The MorphoSys Project: Dynamically Configurable... [1] [2] [3] [4] [5] [6] [7]

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